Ph.D. in Engineering, Indian Institute of Technology, Kharagpur
M.Tech in Radio Physics and Electronics, University of Calcutta
M.Sc in Electronic Science, University of Calcutta
B.Sc with Honours in Physics, University of Calcutta
Undergraduate and postgraduate level teaching (theory and laboratory) as per University ofCalcutta curriculum at Institute of Radio Physics and Electronics, 2008 (Nov-onwards)
Teacher –In Charge of IC Design Laboratory, a research and post-graduate level teaching laboratory.
Teacher-In Charge (jointly) of Electronic Circuits Laboratory and Analog Circuits Simulation,under graduate level teaching laboratories.
Member of the Syllabus sub-committee responsible for up gradation of B.Tech syllabus inElectronics and Communication Engineering at the Institute of Radio Physics and Electronics
Member of the Syllabus sub-committee responsible for upgradation of M.Tech VLSI Design syllabus.
CMOS Analog Design
Semiconductor Device Modeling and Compact Modeling
Engineering Statistics and Data Processing
Analysis of scaling ofthickness of the bufferlayer on analog/RF andcircuit performance ofInAs‐OI‐Si MOSFET usingNQS model
AnalysisofDrainCurrent Local Variabilityof an n-Channel EδDCMOSFET Due to RDDConsidering InversionCharge and CorrelatedMobility Fluctuations
EffectsofBOXEngineeringonAnalog/RF and circuitperformance of InGaAs-OI-Si MOSFET,AcceptedforPublications
Study of G-S/D underlapfor enhanced analogperformanceandRF/circuit analysis ofUTB InAs-OI-Si MOSFETusing NQS small signalmodel,http://dx.doi.org/10.1016/j.spmi.2016.11.053