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Threshold voltage modeling of Deeply Depleted Channel MOSFET and simulation study of its analog performances
Published in IEEE Computer Society
This paper presents the analytical models for the long channel and short channel threshold voltage of Deeply Depleted Channel (DDC) MOS transistor. The model predicted results are compared with TCAD simulation results. This paper also reports the comparative study of the analog performances of the DDC MOS transistor with those of a uniformly doped transistor. The TCAD tool is calibrated with published data of DDC MOS transistor. The better immunity of the DDC MOS transistor in comparison to the conventional bulk MOS transistor is demonstrated through simulation results. © 2014 IEEE.
About the journal
JournalData powered by TypesetInternational Conference on Electronics, Communication and Instrumentation 2014, ICECI 2014
PublisherData powered by TypesetIEEE Computer Society
Open AccessNo