This paper browses through some well-known meta-heuristic search strategies, and briefly discusses some of their recent applications to the VLSI layout design process. It starts with very brief description of the different phases of VLSI layout design, and a brief overview of Meta-Heuristic search strategies. Since most of the VLSI layout design problems are hard optimization problems, the concept of NP-hardness for such problems is next explained along with the various algorithmic frame-works to solve them. Four selected well-known meta-heuristic strategies, namely, Simulated Annealing, Genetic Algorithm, Tabu Search and Ant Colony Optimization are next explained, followed a comparison of these methods. Next, selected applications of these meta-heuristics to VLSI layout design are discussed. Some of their advanced variants and different hybridization techniques, adopted for superior result, are also discussed to highlight the recent research trends in meta-heuristics. Copyright © IICAI 2005.