Header menu link for other important links
X
High performance multi-layer routing for VLSI circuit synthesis
S BHOWAL,
Published in -
2004
Volume: D
   
Pages: D328 - D331
Abstract
This paper presents algorithms for Interconnecting the terminals In a channel using a minimum amount of crosstalk In minimum area. Algorithms are developed for grid-based routing models In two-layer (VH), three-layer (VHV and HVH), and four-layer (VHVH) channels. Our channel routers use only no-dogleg wires and resolve vertical constraints efficiently. The routers are executed for several well-known benchmark channel Instances and results obtained are highly encouraging. © 2004 IEEE.
About the journal
JournalIEEE Region 10 Annual International Conference, Proceedings/TENCON
Publisher-
Open AccessNo