Germanium returns in future nanoelectronics as a potential alternative to Si, in the midst of enormous growth and limitations of Si integrated circuit (IC) technology. The major advantages of Ge result from its augmented bulk carrier mobility, particularly hole mobility and its compatibility to Si technology. Nonetheless Ge has several challenges in particular regarding the choice of suitable passivation schemes, source/drain contacts, and gate dielectrics. Various elegant passivation schemes, good gate dielectrics and source/ drain contacts, along with important process steps for both pFETs and nFETs have been discussed. Special emphasis has been imparted on the modeling issues of double gate MOSFETs, in particular on the determination of device parameters pertaining to analog circuit applications by using both analytical and numerical approaches. Also performance improvement has been pointed out with reference to equivalent Si devices. Furthermore, some exciting open issues have been identified. © 2012 Nova Science Publishers, Inc. All rights reserved.