This paper presents a new algorithm entitled as dominant character genetic algorithm (DGA) along with its hardware architecture entitled as dominant character genetic algorithm hardware architecture (DGA-Arch) for real parameter optimization problem. In DGA, the evolution process is inspired from the dominant characteristics present in human cognizance and it is realized by varying the mutation probability of the genes. On the other hand, DGA-Arch is a resource efficient, highly flexible architecture which is designed and integrated with field programmable gate array-in-loop (FIL) environment and an overall FIL based DGA (FIL-DGA) optimization system is developed. The DGA-Arch was implemented on Virtex IV (ML401, XC4VLX25) field programmable gate array (FPGA) chip with maximum of 5% logic slice utilization and tested for 18 benchmark problems. On an average, the proposed hardware manifested speedup of about 130× over software genetic algorithm (GA) implementation for the test problems. The performance is also compared using 5 modified functions with different GA based hardware reported in existing literature and is found to optimize problems more accurately with greater repeatability and diversity. The DGA-Arch reached convergence within 0.0005–0.009% of function evaluations compared to the total search space and requires almost no repeated synthesis in different problem environment. Later, the FIL-DGA system has been employed to adapt the parameters of few classical engineering problems and a real world application in cognitive radio environment. © 2018 Elsevier B.V.