Work is in progress throughout the globe to efficiently use the potential of the quantum theory of computation over their classical counterpart and hence there is a need of building quantum computing hardware. The target of building quantum computers can be achieved if we have better tools for the design of quantum hardware. Quantum circuit simulators are tools for the logic verification of quantum circuits and they can be an essential component of quantum CAD tools in the future. This work is the extension of the previous work by the authors , in order to increase the efficiency of the simulator and to incorporate more components in the gate library. In this paper we have proposed an efficient simulator which can simulate a quantum circuit specified using the proposed quantum hardware descriptive language (QHDL). © 2010 IEEE.