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Coherence based dual microphone speech enhancement technique using FPGA
Published in Elsevier B.V.
Volume: 55
Pages: 111 - 118
This paper, presents a design and implementation of dual microphone coherence based speech enhancement technique using field programmable gate array (FPGA). In order to have a proper enhancement of dual microphone system, we require to estimate the time delay of arrival (TDOA) between the two microphone signals which is followed by the application of the proposed speech enhancement algorithm. We have used TDOA algorithm based on phase transform to minimize the effect of reverberation for localization of the sound sources. Coherence based technique has been used for speech enhancement process which requires no background noise estimation. In this way, we can achieve a high localization accuracy and also the capability of dealing with coherent noise. In the proposed system, TDOA and speech enhancement processes are executed concurrently exploiting the parallel logic blocks of FPGA, thus increasing the throughput of the system to a great extent. We have implemented our design on Spartan6 Lx45 FPGA device. The subjective evaluation of the proposed design with normal hearing listeners using comprehensibility listing test has been done and its performance has been compared to the existing state of the art research works. The objective evaluation of the proposed design also designates the significant melioration over the existing state of the art research works. The subjective and objective evaluation infer that our proposed hardware induce feasible solution for hearing aid and other hand-held devices. © 2017 Elsevier B.V.
About the journal
JournalData powered by TypesetMicroprocessors and Microsystems
PublisherData powered by TypesetElsevier B.V.
Open AccessNo