In the present communication, a new technique has been introduced for implementing low-power area efficient sub-threshold voltage level shifter (LS) circuit. The proposed LS circuit consists of only nine transistors and can operate up to 100 MHz of input frequency successfully. The proposed LS is made of single threshold voltage transistors which show least complexity in fabrication and better performance in terms of delay analysis and power consumption compared to other available designs. CAD tool-based simulation at TSMC 180 nm technology and comparison between the proposed design and other available designs show that the proposed design performs better than other state-of-the-art designs for a similar range of voltage conversion with the most area efficiency. © 2019, © 2019 IETE.