The emerging trend of design reuse in VLSI circuits poses the threat of theft and misappropriation of intellectual property (IP) of the design. Protection of design IP is a matter of prime concern today. Here we propose a scheme SECUREJP, which tackles the problem from an entirely new viewpoint. It relies on the application of cryptographic principles and the watermarking techniques to provide both direct and indirect IP protection in VLSI physical design. It makes unauthorized disclosure of a valuable design infeasible during its transmission, and can easily detect any alteration of the design file during transmission. The proposed scheme ensures authentication of the original designer as well as non-repudiation between the designer (seller) and the buyer. Illegal reselling can be efficiently detected by the proposed scheme. The algorithm SECURE_IP is tested on random and MCNC benchmark instances, and the experimental results are quite encouraging. © 2007 IEEE.