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A multi-agent co-operative model to facilitate criticality based reliability for mixed critical task execution on FPGA based cloud environment
Published in Institute of Electrical and Electronics Engineers Inc.
Pages: 143 - 148
The present era has witnessed deployment of field programmable gate arrays (FPGAs) in cloud environments, which need to serve mixed critical tasks. For these, tasks with different criticalities need to be executed on a common platform and the property of dynamic partial reconfiguration of FPGAs make it suitable for such purposes. Several task scheduling algorithms are available which ensure suitable task schedules for such environments. However, these do not consider vulnerabilities associated with hardware. Malicious elements like hardware trojan horses (HTHs) may be present in FPGA fabric or in bitstreams procured from various third party vendors that conFigure the FPGAs. HTHs remain dormant during testing and get activated at runtime to jeopardize task executions. To ensure reliability of mixed critical tasks for FPGA based cloud environments from such vulnerabilities, we propose design of simple low overhead performance aware co-operative agents (PACA). These are associated with each FPGA and monitor their performance at runtime. On detecting an anomaly, the agent communicates with other agents of the system and outsources the tasks to ensure their secure completion. Fault diagnosis is also performed by PACA to determine whether the FPGA fabric is affected or the bitstream is affected. If the FPGA is affected, then it continues to outsource its tasks to other FPGAs, else it marks the vendor who supplied the affected bitstream as untrustworthy and avoids bitstreams procured from it in future. Thus, via multi agent cooperation, system reliability is ensured. Experimental validation is performed via the metric task success rate over normalized task deadline and increment in FPGA resources for several hardware tasks, associated with standard ISCAS and ITC 99 benchmarks. Low overhead of security components over various homogeneous FPGA environments determine the feasibility of proposed mechanism for practical applications. © 2020 IEEE.